• 专利标题:   Transistor for semiconductor device, has channel layer that comprises graphene layer and hexagonal boron nitride sheets dispersed in graphene layer and arrangement directions of hexagonal boron nitride sheets that are aligned and source/drain region next to gate stack that is obtained.
  • 专利号:   CN115498021-A, US2023066449-A1, TW202310412-A
  • 发明人:   CHEN Z, CHU Z, CHEN T, CHUU C
  • 专利权人:   TAIWAN SEMICONDUCTOR MFG CO LTD, TAIWAN SEMICONDUCTOR MFG CO LTD, TAIWAN SEMICONDUCTOR MFG CO LTD
  • 国际专利分类:   H01L021/336, H01L029/10, H01L029/16, H01L029/20, H01L029/78, H01L021/02, H01L029/04, H01L029/205, C01B032/182, H01L029/12
  • 专利详细信息:   CN115498021-A 20 Dec 2022 H01L-029/10 202307 Chinese
  • 申请详细信息:   CN115498021-A CN10077484 24 Jan 2022
  • 优先权号:   US460327

▎ 摘  要

NOVELTY - The transistor has a channel layer that comprises a graphene layer and hexagonal boron nitride sheets dispersed in the graphene layer. The arrangement directions of the hexagonal boron nitride sheets are aligned. A gate stack on the channel layer is obtained. A source/drain region next to the gate stack is obtained. A first hexagonal boron nitride layer and a second hexagonal boron nitride layer are arranged on two opposite sides of the channel layer, and the second hexagonal boron nitride layer is located at the gate between the pole stack and the channel layer. The source/drain region is in physical contact with the second hexagonal boron nitride layer and physically separated from the channel layer by the second hexagonal boron nitride layer. USE - Transistor for semiconductor device. ADVANTAGE - The hexagonal boron nitride (hBN) sheet is formed on the single crystal copper film to form the graphene layer filling the space between the hBN sheets, thus the semiconductor device in a simple and cost-effective manner is formed, and the performance of the transistor is improved. The graphene layer is deposited on the copper film to wrap the hexagonal boron nitride sheet to form a hexagonal boron nitride carbon (hBNC) layer, and the gate stack is located on the channel layer, so that the source/drain regions are located beside the gate stacks, thus the parasitic capacitance between the source and drain regions is reduced, and the leakage current of the device is reduced, and the reliability of the transistors is improved effectively. DETAILED DESCRIPTION - INDEPENDENT CLAIMS are included for the following: (1) a manufacturing method of hexagonal carbon boron nitride layer; (2) a method for manufacturing a semiconductor device. DESCRIPTION OF DRAWING(S) - The drawing shows a schematic view of the transistor for semiconductor device.