国家/地区 中国（2）
IPC部
IPC大类
IPC小类
IPC
发明人 DU J（2）
公开年 2012（2）
申请年
专利权人

Enhanced type graphene FET for integrated circuit, has main portion that is provided with gate region, source region, drain region, channel region and source/drain semiconductor doped region.

DU J, LIU J, SHI R

Preparation of high quality graphene comprises taking graphite intercalation compound including halogen or metal halide as intercalation agent, swelling in oxalic acid solution or hydrogen peroxide solution, and ultrasonically peeling.

CHENG H, LI F, DU J, HUANG K, REN W, PEI S