国家/地区 日本（5） 美国（4）
IPC部 H（5） C（3）
IPC大类 H01（5） C01（3）
IPC小类 H01L（5） C01B（3）
IPC H01L021/3205（5） H01L021/768（5） H01L023/532（5）
H01L023/522（4） C01B032/15（3） C01B032/18（3）
C01B032/182（3） H01L021/00（2） H01L023/528（2）
发明人 KAJITA A（5）
公开年 2017（5）
申请年 2016（5）
专利权人 TOSHIBA KK（5）

Semiconductor device has graphene wiring which is connected to conductive region, and corrosion-proof element which is provided to cover area different from partial area of upper surface of connecting element.

MIYAZAKI H, SAKAI T, ISOBAYASHI A, ISHIKURA T, KAJITA A

Semiconductor device, has interconnect having catalyst layer capable of growing graphene, graphene layer in side surface of catalyst layer, and non-catalyst layer in bottom surface of graphene layer, and incapable of growing graphene.

SAITO T, ISOBAYASHI A, KAJITA A

Semiconductor device, has upper graphene layer formed on upper face of catalyst layer, and side graphene layers provided on two respective side faces of catalyst layer, where two side faces extend in interconnect length direction.

ISHIKURA T, ISOBAYASHI A, SAITO T, KAJITA A, SAKAI T

Semiconductor device, has plug connected with first region, and graphene layer containing impurities and formed with first region and second region, where resistance of second region is larger than resistance of first region.

ISOBAYASHI A, KAJITA A, SAKAI T

Semiconductor device e.g. integrated circuit has first graphene layer with stacked structure and has multiple graphene sheets, in which each graphene sheet has depression in central portion.

SAITO T, ISOBAYASHI A, KAJITA A, SAKAI T