国家/地区 美国（4） 中国（2） 台湾（2）
IPC部 H（4）
IPC大类 H01（4）
IPC小类 H01L（4）
IPC
发明人 WU C（2）
公开年 2021（3）
申请年 2020（4）
专利权人 TAIWAN SEMICONDUCTOR MFG CO LTD（4）

Memory device has multiple stacked tiers having redistribution structure closest to first semiconductor die comprising thermally conductive layer connected to first semiconductor die, and second semiconductor dies wrapped by encapsulant.

HSIEH Y, CHIANG Y, KO T, LIU M, PU H, HUANG C

Semiconductor device e.g. integrated circuit has layer of deposited capacitor material (DCM) which is set over channel region, dielectric layer that is set over DCM layer, and metallic gate electrode layer which is set over dielectric layer.

HUANG W, TSAI C, CHENG K, WANG C, CAI Q, CHENG G, WANG Z, WANGCHUN H, WANG C H, CHENG K L, TSAI C W, HUANG W C

Memory device used in electronic applications e.g. cell phone comprises substrate, first conductive layer, phase change layer over first conductive layer, selector layer between phase change and first conductive and second conductive layer.

WU C

Using deposition system involves loading wafer into processing chamber equipped with RF system, supplying aromatic hydrocarbon precursor into processing chamber, turning on RF power of RF system to decompose aromatic hydrocarbon precursor into active radicals.

WU C, NI I, HSU Y, HUANG J, XU Y, WU Z