国家/地区 美国（4）
IPC部 B（4） H（4）
IPC大类 B82（4） H01（4）
IPC小类 B82Y（4） H01L（4）
IPC B82Y040/00（2） B82Y099/00（2） H01L021/336（2）
H01L029/06（2） H01L029/16（2）
发明人 FARMER D B（4）
公开年 2013（4）
申请年 2012（4） 
专利权人 INT BUSINESS.（4）

Graphene transistor device for graphene transistor system has interface that maintains consistent degree of electrical conductivity between graphene layer and source and drain electrodes.

AFZALIARDAKANI A, AVOURIS P, FARMER D B, LIN Y, ZHU Y

Method for fabricating graphene transistor device, involves lifting-off resist and electrode and dielectric materials arranged above resist to form gate structure with gate electrode and gate dielectric space.

AFZALIARDAKANI A, AVOURIS P, FARMER D B, LIN Y, ZHU Y

Semiconductor structure for semiconductor device, has substrate, graphene layer and double layer gate dielectric having alternate lamination of silicon nitride layer and hafnium oxide layer.

DIMITRAKOPOULOS C D, FARMER D B, GRILL A, LIN Y, NEUMAYER D A, PFEIFFER D, ZHU W, DIMITRAKOPOULOS C

Transistor structure, comprises graphene layer located on insulating layer, first metal portion overlying portion of graphene layer, second metal portion contacting and overhanging first metal portion, first electrode, and second electrode.

AVOURIS P, FARMER D B, LIN Y, ZHU Y