国家/地区 韩国（4） 美国（4）
IPC部 C（4）
IPC大类 C23（4）
IPC小类 C23C（4） H01L（4） C01B（3）
IPC H01L021/285（4） H01L021/768（4） C01B032/186（3）
C23C016/26（3） C23C016/02（2） C23C016/505（2）
C23C016/511（2） H01L021/02（2） H01L023/532（2）
发明人 LEE C（4）
公开年 2023（4）
申请年 2022（3） 
专利权人 SAMSUNG ELEC.（4）

Graphene interconnect structure useful for electronic device comprises first oxide dielectric layer including porous silicon oxide, or amorphous boron nitride, second oxide dielectric layer including aluminum oxide and graphene layer.

KIM C, BYUN K E, SHIN K W, LEE C S, BAEKWON P, PARK B, LEE C, SHIN K, BYUN K

Manufacture of wiring used in electronic device, involves growing graphene layer on substrate using plasma of hydrocarbon at specific temperature by plasma enhanced chemical vapor deposition, and doping graphene layer with metal.

LEE C, LEE M, SHIN H, BYUN K, KIM K, SHIN K, SHIN K W, KIM K B, BYUN K E, SHIN H J, HYUN L, LEE C S

Layer structure for use in integrated circuit device, comprises lower layer, ion implantation layer in lower layer, and carbon-based material layer on ion implantation layer, and ion implantation layer includes carbon, and further has high electrical performance with ultra small structure.

YOO M, BYUN K, KIM S, LEE C, LEE C S, BYUN K E, YOO M S

Method of forming nano crystalline graphene, involves arranging substrate having pattern in reaction chamber, injecting reaction gas into reaction chamber, reaction gas including carbon source gas, inert gas, and hydrogen gas that are mixed, generating plasma of reaction gas in reaction chamber.

LEE C, JUNG A, SHIN H, SHIN K, SHIN K W, SHIN H J, JUNG A R, LEE C S