国家/地区 美国（4） 韩国（3）
IPC部 H（4） B（2） C（2）
IPC大类 H01（4） B82（2） C01（2）
IPC小类 H01L（4） B82Y（2） C01B（2）
IPC H01L021/02（3） H01L021/768（2） H01L023/532（2）
H01L029/16（2）
发明人 JUNG A（4）
公开年 2023（4）
申请年 2022（2） 
专利权人 SAMSUNG ELECTRONICS CO LTD（4）

Graphene structure for use in semiconductor device, comprises substrate, graphene on surface of substrate, and bonding region, where material of substrate and carbon of the graphene are covalently bonded, between surface of substrate and graphene, where bonding region has silicon carbide.

JUNG A, LEE C, SHIN K, KIM C, SHIN H, SONG H, BYUN K, LEE E

Interconnect structure for electronic device, comprises first dielectric layer including trench, conductive wire filling inside of trench, first cap layer on top surface of conductive wire, first cap layer including doped graphene, and doped graphene being graphene doped with group fifth element.

JUNG A, KIM S, SHIN K, SHIN K W, KIM S T, JUNG A R

Multi bridge channel field effect transistor for use in e.g. memories, has gate insulating layer that surrounds first channel layer, and gate electrode that surrounds first channel layer with gate insulating layer.

KIM C, KIM U, JUNG A, BYUN K, JIN Y, JIN C, JUNG A R, BYUN K E

Method of forming nano crystalline graphene, involves arranging substrate having pattern in reaction chamber, injecting reaction gas into reaction chamber, reaction gas including carbon source gas, inert gas, and hydrogen gas that are mixed, generating plasma of reaction gas in reaction chamber.

LEE C, JUNG A, SHIN H, SHIN K, SHIN K W, SHIN H J, JUNG A R, LEE C S