国家/地区 台湾（4）
IPC部 C（4）
IPC大类 C23（4）
IPC小类 C23C（4） H01L（4）
IPC C23C016/26（4）
发明人 SHARMA K（2）
公开年 2022（3）
申请年 2022（4）
专利权人 LAM RES CORP（2）

Forming dual damascene structure on semiconductor substrate, involves selectively depositing carbon layer on exposed metal surface.

PARBATANI A, VAN SCHRAVENDIJK B J, VARADARAJAN B N, NARKEVICIUTE I, SRINIVASAN E, SHARMA K, KNARR R, SCHMITZ S, RAMANAN V, NOGAMI T, NGUYEN S V, HUANG H, SHOBHA H K, LI J, PEETHELA C B, EDELSTEIN D C

Processing substrates by providing semiconductor substrate, which comprises metal layer formed in dielectric layer and barrier layer between metal layer and dielectric layer, depositing graphene on exposed metal surface, depositing inhibitor layer and depositing dielectric material.

HAUSMANN D M, RAMNANI P G, SHARMA K, LEMAIRE P C, MAHOROWALA A P

Wafer used to chemical vapor deposition growth of uniform graphene comprises planar silicon substrate, insulating layer provided across silicon substrate, and barrier layer provided across the insulating layer.

DIXON S, KAINTH J, JAGT R, GUINEY I, BADCOCK T J

Acetylene fluid supply package for use in fabricating a semiconductor device, has pressure vessel, porous filler in the pressure vessel, improved solvent within the porous filler, where solvent solubilizing with acetylene absorbed within the improved solvent, improved solvent is triethyl phosphate.

HAN Y, CHUNG W, CHO Y, KANE W S, SONG X, SINHA A K, CHO Y J