国家/地区 中国（5） 世界知识产权组织（3） 美国（2）
IPC部 H（5） G（3）
IPC大类 H01（5） G11（2）
IPC小类 H01L（5） G11C（2）
IPC H01L045/00（5） G11C013/00（2）
发明人 LV H（5）
公开年 2016（2）
申请年 2015（2）  2020（2） 
专利权人 INST MICROELECTRONICS CHINESE ACAD SCI（5）

Resistive random access memory, has barrier structure set between resistance change layer and upper electrode for performing erasing operation on device, where electron passes through conduction band of barrier structure.

XU X, LI X, DONG D, YU J, LV H

Memristor for memristor-based neural morphology calculation chip, has barrier layer located on functional layer, and upper electrode layer that is located on barrier layer, where functional layer is resistive layer.

LIU M, LV H, ZHENG X, LI X, DONG D, YU J, XU X

Bipolar retardant variable storage device, comprises substrate, lower electrode surface, rectification function layer, graphene layer, resistive dielectric layer, and upper electrode, where rectification layer is made of aluminum oxide.

LU N, LV H, LIU M, LIU Q, LIU S, LONG S, WANG Y, ZHANG K, ZHAO X

Non-volatile resistive memory, has graphene barrier layer stopping easily oxidizable metal ions from migrating into inert metal electrode through resistive functional layer under effects of electric field during programming process.

LIU Q, LIU M, SUN H, ZHANG K, LONG S, LV H, BANERJEE W, BENAGI R

Storage device, comprises insulating substrate, lower electrode, lower barrier layer graphene, resistive functional layer and upper electrode, where resistive functional layer is located on lower barrier layer graphene.

LV H, LIU M, LIU Q, SUN H, ZHANG K, BENAGI R, BANERJEE W