国家/地区 日本（5） 美国（5）
IPC部 H（5） B（3） C（3）
IPC大类 H01（5） B82（3） C01（3）
IPC小类 H01L（5） B82Y（3） C01B（3）
IPC H01L021/3205（5） H01L021/768（5） H01L023/532（5）
C01B031/02（3） B82Y030/00（2） H01L021/02（2）
H01L023/48（2） H01L023/522（2） H01L029/06（2）
发明人 WADA M（5）
公开年 2014（5）
申请年 2013（5） 
专利权人 TOSHIBA KK（5） KAJITA A（3） WADA M（3） ISOBAYASHI A（2）
SAITO T（2） YAMAZAKI Y（2）

Semiconductor device has metal interconnect and graphene interconnect that are stacked to one another.

SAKATA A, KITAMURA M, WADA M, KATAGIRI M, YAMAZAKI Y, KAJITA A

Semiconductor device has lower-layer contact which is connected to undersurface side of first multi-layered graphene wire while upper-layer contact is connected to upper surface side of second multi-layered graphene wire.

WADA M, MIYAZAKI H, KAJITA A, ISOBAYASHI A, SAITO T, SAKAI T

Semiconductor device, has roll form graphene layer formed to surround catalyst metal layer and for growing with side surface of catalyst metal layer to set as growth origin, where facet is formed on side surface of catalyst metal layer.

WADA M, YAMAZAKI Y, KAJITA A, ISOBAYASHI A, SAITO T

Semiconductor device has through vias each formed through graphene wiring structure and connection insulating film to connect part of semiconductor elements to graphene wires.

WADA M, KAJITA A, ISOBAYASHI A, SAITO T

Semiconductor device has wiring layer which is formed of graphene and in contact with carbon nanotube on upper surface of portion of catalytic layer outside hole so that portions of catalytic layer are perforated and continuous films.

SAITO T, WADA M, ISOBAYASHI A, YAMAZAKI Y, KAJITA A