国家/地区 美国（6） 韩国（4） 中国（2）
IPC部 C（6）
IPC大类 C01（6）
IPC小类 C01B（6）
IPC H01L021/285（6）
发明人 BYUN K（3） BYUN K E（3） LEE C（3）
LEE C S（3） SHIN K（3） SHIN K W（3）
SHIN H（2） SHIN H J（2）
公开年 2023（4） 2022（2）
申请年 2022（6）
专利权人 SAMSUNG ELEC.（3）

Graphene interconnect structure useful for electronic device comprises first oxide dielectric layer including porous silicon oxide, or amorphous boron nitride, second oxide dielectric layer including aluminum oxide and graphene layer.

KIM C, BYUN K E, SHIN K W, LEE C S, BAEKWON P, PARK B, LEE C, SHIN K, BYUN K

Manufacture of wiring used in electronic device, involves growing graphene layer on substrate using plasma of hydrocarbon at specific temperature by plasma enhanced chemical vapor deposition, and doping graphene layer with metal.

LEE C, LEE M, SHIN H, BYUN K, KIM K, SHIN K, SHIN K W, KIM K B, BYUN K E, SHIN H J, HYUN L, LEE C S

Depositing graphene barrier film, involves placing substrate containing the titanium thin film layer into substrate processing system chamber forming processing space, supplying first reaction gas into chamber, supplying second reaction gas, and forming graphene layer on titanium thin film layer.

PARK J, LI J, JIN D, SUN W, KIM T, YIN Y, TIAN Z, BAK H, PARK J H, LEE K J, KIM D W, SUN W H, KIM T S, YOON W J, JEON J H, PARK H K, PARK H, JEONJINHO, YUN W J, WOO K D, LEE K

Processing semiconductor for producing high quality devices and structures, involves delivering carbon-containing precursor and hydrogen-containing precursor to processing region of semiconductor processing chamber, forming layer of graphene on substrate positioned in processing region of chamber.

INGLE N K, MALLICK A B, SINGHA R S, WANG J

Repairing layers of laminate stack or printed circuit board, comprises providing layered structure, identifying fault location in outer graphene layer, preparing surface of outer graphene layer, and applying localized heat on fault location.

MENTOVICH E, ATIAS B, NAVEH D, LEVI A, SMOLINSKY E Z B

Nanocrystalline graphene used for complementary metal-oxide-semiconductor process, comprises grains in stack of graphene sheets.

KIM S, BYUN K, CHO Y, SHIN K, LEE E, LEE C, SONG H, SHIN H, YOON J, LEE S, LIM H, BYUN K E, CHO Y C, SHIN K W, LEE C S, SONG H J, SHIN H J, SU Y J, LEE S Y, LIM H S, LI Z, YOUN J, SHEN X, LI C, LI Y, ZHAO L, JIN S