国家/地区 美国（67）
IPC部 C（67） H（67） B（53）
G（6）
IPC大类 C01（67）
IPC小类 C01B（67）
IPC H01L029/06（67）
发明人 SHIN H（6） SHIN H J（6） KIM S（4）
SATO S（4） AHN J（3） BYUN K（3）
BYUN K E（3） CHOI J（3） CHOI J Y（3）
HIROOKA M（3） ISOBAYASHI A（3） KAJITA A（3）
LEE J（3） NAM S（3） OKAI M（3）
公开年 2014（13） 2013（9） 2012（8） 2015（8） 2011（6） 2017（5） 2010（4） 2021（3） 2016（2） 2018（2） 2020（2） 2022（2）
申请年 2012（11）  2013（10）  2011（8）  2015（8）  2014（7）  2010（5）  2016（3）  2018（3）  2008（2）  2009（2）  2019（2）  2021（2） 
专利权人 SAMSUNG ELEC.（12） FUJITSU LTD（8） TOSHIBA KK（5） INT BUSINESS.（4）
UNIV SUNGKYU.（4） DOKURITSU GY.（3） HITACHI LTD（3） NAT INST ADV.（3）
EMPIRE TECHN.（2） HON HAI PREC.（2） ISOBAYASHI A（2） KAJITA A（2）
OKAI M（2） SAITO T（2） SUMITOMO ELE.（2） UNIV SUNGKYU.（2）
UNIV SUNGKYU.（2） UNIV TSINGHU.（2） WADA M（2） WADA Y（2）

Transferring one or more nanostructures from one substrate to another substrate by applying coating of crosslinkable copolymer over one or more nanostructures on surface of substrate, heating, transferring nanostructures and copolymer onto another substrate surface, and removing copolymer.

ARNOLD M S, JACOBBERGER R M, GOPALAN P, DWYER J H

Method for preparing FET e.g. junction FET, involves providing interdigital electrode on graphene nanoribbon composite structure, where electrode covers set of protrusions and is electrically connected to set of graphene nano-ribbons.

ZHANG T, ZHANG L, JIN Y, LI Q, FAN S

Conductive structure, comprises conductive material layer including metal and work function control layer including two-dimensional material with defect, to control work function of conductive structure.

LEE C, KIM C, LEE E, BYUN K, KIM S, SHIN H, SHIN H J, BYUN K E, LEE C S, LI C, JIN C, LI Y, JIN S, SHEN X

Device comprising physical properties controlled by microstructure, comprises base layer having patterned surface, and two-dimensional structure layer formed on patterned surface of base layer.

CHEN T, HO S, HSIEH Y, CHANG C, CHANG C H

Layered body useful in electronic element, such as transistor, comprises base portion comprising silicon carbide and having surface which is silicon surface, and carbon atom thin film arranged over surface and comprising carbon atoms.

MITSUHASHI F, TATENO Y, ADACHI M, YAMAMOTO Y

Formation of nanocrystalline graphene used for semiconductor device, involves arranging substrate in chamber, forming protective layer, injecting reaction gas, generating plasma, and growing nanocrystalline graphene on protective layer.

JUNG A, SHIN K, BYUN K, SHIN H, LIM H, NAM S, SONG H, CHO Y, JUNG A R, SHIN K W, BYUN K E, SHIN H J, LIM H S, NAM S G, SONG H J, CHO Y C

Interconnect structure for use in electronic device, has cap layer provided on surface of conductive wiring and which includes nanocrystalline graphene comprising nano-sized crystals.

BYUN K, SHIN K, KIM Y, SHIN H, SONG H, LEE C, KIM C, CHO Y, BIAN Q, SHEN J, JIN Y, SHEN X, SONG X, LI C, JIN C, ZHAO L, BYUN K E, SHIN K W, HUN K Y, SHIN H J, SONG H J, LEE C S, CHO Y C

Graphene nanoribbon precursor for use in graphene nanoribbon that is utilized in electronic device for channel of FET and resonant tunneling diode, comprises substituted terphenyl compound.

YAMAGUCHI J

Graphene nanoribbon used in a semiconductor device which his useful in electronic devices e.g. computers, smartphones, portable telephones and tablet terminals comprises a chiral edge to which an electron-withdrawing group is bonded.

OHTOMO M, OTOMO M

Graphene structure for use in a semiconductor device, comprises a multilayer graphene that is laminated with graphene sheets, where three interlayer materials are presented between the graphene sheets of the multilayer graphene.

MIYAZAKI H, YOSHIDA T, KATAGIRI M, YAMAZAKI Y, SAKAI T