国家/地区 日本（8）
IPC部 H（8） C（5）
IPC大类 H01（8） C23（4） C01（3）
H05（2）
IPC小类 H01L（8） C23C（4） C01B（3）
H01J（2） H05H（2）
IPC H01L021/3205（6） H01L021/768（6） H01L023/532（6）
H01L021/28（5） C23C016/26（4） H01L021/285（4）
H01L023/52（4） C23C016/44（3） C23C016/511（3）
H01L021/205（3） H01L021/314（3） C23C016/02（2）
H01J037/32（2） H01L021/00（2） H01L021/02（2）
发明人 WADA M（8）
公开年 2012（4） 2021（2） 2023（2）
申请年 2011（3）  2020（2）  2022（2） 
专利权人 TOKYO ELECTR.（4） TOSHIBA KK（4）

Film forming method involves loading substrate into processing container, forming interface layer having amorphous structure or microcrystalline structure on substrate by plasma of first mixed gas including carbon-containing gas and forming graphene film on interface layer.

NAKAMURA G, TERADA H, MATSUMOTO T, KABUKI N, WADA M, IFUKU R, NAKAMURA K, KAMURAGI N

Processing substrate involves carrying substrate having silicon-containing film on surface of substrate into processing container, forming adsorption layer, forming silicon oxide layer, and forming graphene film on silicon oxide layer by supplying carbon-containing gas into processing container.

FURUYA H, YAMADA H, IFUKU R, MATSUMOTO T, WADA M, HARUHIKO F A

Film forming by cleaning interior of treatment container, extracting and removing oxygen inside treatment container, introducing substrate into treatment container, and forming carbon film on substrate by plasma chemical vapor deposition.

MAKOTO W, TAKASHI M, NOBUTAKE K, RYOTA I, MASAHITO S, HIROKAZU U, MATSUMOTO T, KABURAGI N, IFUKU R, SUGIURA M, UEDA H, WADA M, KABUKI N

Processing device for forming film, consists of processing container having thermal sprayed ceramic coating on inner wall, mounting table for holding substrate and control unit for performing precoating and film forming.

WADA M, MATSUMOTO T, SUGIURA M, IFUKU R, UEDA H, KURYOTA L

Graphene interconnection for use in interconnection layer of large scale integration device, has graphene layer formed on catalyst film in interconnection trench and provided with graphene sheets.

SAITO T, WADA M, KAJITA A, SAKATA A

Graphene interconnection of large scale integration (LSI) device, has graphene sheets which are stacked in direction perpendicular to side surfaces of interconnection trench.

SAITO T, WADA M, KAJITA A

Semiconductor device for NAND flash memory comprises insulating layer with trench, interconnect layer in trench having copper and concave portion in the copper, and graphene sheet on inner surface of concave portion.

WADA M, YAMAZAKI Y

Semiconductor device has graphene layer with several graphenes which are laminated vertically.

WADA M, YAMAZAKI Y, KAJITA A, SAKATA A