国家/地区 中国（8）
IPC部 H（6） C（4）
IPC大类 H01（6） C23（2）
IPC小类 H01L（6） C23C（2）
IPC H01L021/336（2） H01L029/78（2）
发明人 SUN Q（6） ZHANG W（6） WANG P（4）
WU D（3） ZHOU P（3） CUI X（2）
JIANG T（2） SONG P（2） SUN M（2）
ZHANG X（2）
公开年 2011（8）
申请年 2011（6）  2010（2） 
专利权人 UNIV FUDAN（8）

Gate oxide medium forming method for graphene FET in graphene apparatus, involves forming metal contact graphene layer, depositing atom layer to grow boron nitride as gate oxide medium, and arranging gate electrode on gate oxide medium.

SUN Q, WANG P, WU D, ZHANG W, ZHOU P

Chemical method for preparing graphene used for industrialized application, involves preparing graphene oxide, adding oxalic acid crystal to resulting suspension liquid followed by heating, stirring, reacting, warming, washing and drying.

CUI X, SONG P, SUN M, ZHANG X

Method for preparing graphene FET, involves generating photoconduction effect in radiation of infrared ray by graphene channel layer.

ZHOU P, ZHANG W, WU D, SUN Q

Graphene FET for use in infrared detector for sky survey infrared detection application, has graphene channel layer generating photoconductive effect under infrared radiation and provided with multiple layers of graphite.

ZHOU P, ZHANG W, WU D, SUN Q

Preparing photoinduced hydrophobic film comprises taking graphite powder, preparing graphite oxide by Hummers oxidation, dispersing to obtain graphene oxide colloidal solution, preparing graphene oxide film on a solid surface and processing.

CUI X, SONG P, ZHANG X, SUN M

Transistor i.e. FET, has leakage electrode that is in contact with semiconductor lining substrate, and source electrode that is in contact with uppermost graphene layer of overlapped layer.

WANG P, ZHANG W, LIN X, SUN Q

Method for depositing high dielectric constant material on graphene surface atomic layer in manufacture of integrated circuit, involves applying electric field to cavity in which silicon substrate with graphene is placed.

WANG P, ZHANG W, JIANG T, SUN Q

Graphene transistor used in carbon based integrated circuit, has graphene layer that is isolated between second insulator layer and gate electrode through air gap.

WANG P, ZHANG W, JIANG A, JIANG T, SUN Q