国家/地区 美国（45） 韩国（40） 中国（14） 欧洲专利局（EPO）（12） 台湾（4） 世界知识产权组织（2）
IPC部 H（46） C（16） G（9）
B（7）
IPC大类 H01（45） C01（8） C23（8）
G01（5） B01（3） C08（3）
C09（3） G03（3） B23（2）
B82（2） G06（2） H05（2）
IPC小类 H01L（41） C01B（8） C23C（8）
G01N（4） B01D（3） C08K（3）
G03F（3） H01M（3） B23K（2）
B82Y（2） G01B（2） H01J（2）
H05K（2）
IPC H01L021/02（17） H01L021/768（14） H01L029/16（11）
H01L023/532（10） H01L021/285（8） H01L029/24（8）
H01L029/786（7） H01L029/06（6） H01L029/66（6）
C23C016/26（5） H01L023/00（5） H01L023/522（5）
H01L029/45（5） C01B032/186（4） H01L023/528（4）
发明人 SHIN H（32） SHIN H J（26） BYUN K（16）
SHIN K（14） BYUN K E（12） KIM S（11）
LEE C（11） SHIN K W（11） CHO Y（10）
SEOL M（10） LEE C S（9） LEE E（9）
LEE M（9） SHEN X（9） CHO Y C（7）
公开年 2022（33） 2021（16） 2023（8）
申请年 2021（57）
专利权人 SAMSUNG ELECTRONICS CO LTD（57）

Ideal electronic device comprises coating layer coated on at least portion of surface of component, polymer and conductive filler, where conductive filler is graphene nano-tube.

HONG J M, JEONG M K, KO Y D, SHIN J E, SOO L J, JEONG K H

System for measuring image of pattern in scanning type extreme ultraviolet mask process of manufacturing semiconductor device, has order sorting aperture configured to transmit first-order diffraction light of focused coherent EUV light.

LEE D

Two-dimensional material structure for use in semiconductor device, has two-dimensional material layer formed on exposed surface of insulator, and another two dimensional material layer including two dimensional materials.

SEOL M, SHIN K W, KWON J, YOO M S, LEE C S, LEE C, YOO M, SHIN K

Air filter structure, has graphene filter layer arranged on surface of conductive mesh layer, and air filter structure formed on side of mesh layer by electro-deposition process, where mesh layer is formed with mesh.

PARK S M, SAEMI K, KIM S, PARK H J, BAE L, JUNG Y K, JEONG Y W, HONGSEONGPIL

Interconnect structure for electronic device, has conductive line arranged in trench, where first cap layer is formed on upper surface of conductive line, and comprises graphene-metal composite that comprises graphene.

SHIN H, BYUN K, NAM S, SHIN K, SHIN K W, NAM S G, BYUN K E, SHIN H J

Depositing film, used in semiconductor element, involves preparing non-planar substrate, depositing film having thickness deviation on first surface, second surface, and inclined surface, and etching film deposited on first surface, second surface, and inclined surface.

SHIN K, KIM S, LEE C, LEE C S, SHIN K W

Method of forming nano crystalline graphene, involves arranging substrate having pattern in reaction chamber, injecting reaction gas into reaction chamber, reaction gas including carbon source gas, inert gas, and hydrogen gas that are mixed, generating plasma of reaction gas in reaction chamber.

LEE C, JUNG A, SHIN H, SHIN K, SHIN K W, SHIN H J, JUNG A R, LEE C S

Method for manufacturing semiconductor device, involves forming mold structure on substrate, where mold structure includes sacrificial films and interlayer insulating films alternately stacked along direction perpendicular to upper surface.

KIM J H, KIMSUNGGIL, SHIN H J, YANG S Y, CHOI H

Interconnect structure used in electronic device, comprises conductive wiring having certain pattern, dielectric layer on side surfaces of conductive wiring, capping layer on conductive wiring and graphene layer on dielectric layer.

SHIN H, BYUN K, SHIN J, SHIN K, SHIN K W, BYUN K E, SHIN H J

Interconnect structure used in electronic device, comprises dielectric layer, conductive interconnect on dielectric layer and graphene cap layer on conductive interconnect, where graphene cap layer contains graphene quantum dots.

SHIN H, BYUN K, KIM S, SEOL M, SHIN K, SHIN K W, BYUN K E, SHIN H J