国家/地区 美国（9） 韩国（8） 中国（4） 欧洲专利局（EPO）（3） 日本（3）
IPC部 C（9）
IPC大类 C01（9） H01（9） C23（6）
IPC小类 C01B（9）
IPC C01B032/186（6） C23C016/26（5） C01B032/182（4）
C23C016/50（4） H01L021/02（4） H01L021/285（3）
H01L021/768（3） H01L023/532（3） H01L029/16（3）
C23C016/02（2） C23C016/511（2） C23C016/513（2）
H01L021/3205（2） H01L029/06（2）
发明人 KIM C（9）
公开年 2020（3） 2021（2）
申请年 2020（2）  2021（2） 
专利权人 SAMSUNG ELEC.（7）

Graphene interconnect structure useful for electronic device comprises first oxide dielectric layer including porous silicon oxide, or amorphous boron nitride, second oxide dielectric layer including aluminum oxide and graphene layer.

KIM C, BYUN K E, SHIN K W, LEE C S, BAEKWON P, PARK B, LEE C, SHIN K, BYUN K

Forming graphene product including nanocrystalline graphene by plasma enhanced chemical vapor deposition process, involves growing nanocrystalline graphene directly on substrate using plasma of reaction gas.

LEE E, LEE S, BYUN K, KIM C, LEE C, SHIN H, SHIN K, SONG H

Conductive structure, comprises conductive material layer including metal and work function control layer including two-dimensional material with defect, to control work function of conductive structure.

LEE C, KIM C, LEE E, BYUN K, KIM S, SHIN H, SHIN H J, BYUN K E, LEE C S, LI C, JIN C, LI Y, JIN S, SHEN X

Method for forming graphene, involves preparing a substrate in a reaction chamber, performing a first growth process of growing multiple graphene aggregates apart from each other on the substrate at a first growth rate.

CHO Y, LEE C, KIM C, SHIN H, SHIN K, NGUYEN V L, SHIN K W, SHIN H J, LEE C S, CHO Y C

Formation of graphene for metal wiring for semiconductor device, involves directly growing graphene on non-catalyst substrate based on injecting reaction gas comprising carbon source having preset ionization energy, into reaction chamber.

SONG H, LEE E, LEE C, KIM C, BYUN K, SHIN K, SHIN H, SONG H J, LEE C S, BYUN K E, SHIN K W, SHIN H J

Method of forming graphene on substrate, involves treating surface of substrate placed in reaction chamber with plasma, and growing graphene on surface of substrate by plasma enhanced chemical vapor deposition (PECVD).

SHIN K, KIM C, YAMAMOTO K, LEE C, SONG H, LEE E, BYUN K, SHIN H, AN S, SHEN J, JIN C, SHAN B, LI C, SONG X, LI Y, BIAN Q, SHEN X, AN X, SHIN K W, LEE C S, SONG H J, BYUN K E, SHIN H J, AHN S J

Interconnect structure for use in electronic device, has cap layer provided on surface of conductive wiring and which includes nanocrystalline graphene comprising nano-sized crystals.

BYUN K, SHIN K, KIM Y, SHIN H, SONG H, LEE C, KIM C, CHO Y, BIAN Q, SHEN J, JIN Y, SHEN X, SONG X, LI C, JIN C, ZHAO L, BYUN K E, SHIN K W, HUN K Y, SHIN H J, SONG H J, LEE C S, CHO Y C

Process for forming PN junction in graphene layer through deoxyribonucleic acid (DNA) coating, involves forming DNA lamina molecular having base structure of array in order to absorb on second area of graphene layer.

KIM C, KIM Y J, JUNG Y M, JUN S C, LEE T, LEE S, BYUN Y T, WOO D H, KIM S H, SEO M A, KIM J H, YI J C

Method for forming graphene pattern using exfoliation technique, involves selectively peeling graphene layer by polymer stamp, and forming raised pattern on rotator polymer stamp, where polymer stamp is made of polydimethylsiloxane.

AN K, CHUNG T, JUNG D, KIM C G, KIM H S, LEE S S, LEE Y K, AN K S, CHUNG T M, LEE S, LI Y, KIM C, KIM H