国家/地区 中国（15）
IPC部 H（15） C（3） B（2）
IPC大类 H01（15） C01（2） C09（2）
IPC小类 H01L（12） H01M（3） C01B（2）
C09K（2） H01B（2）
IPC H01L023/532（12） H01L021/768（11） H01L023/522（8）
H01L023/528（5） H01L023/48（3） C01B032/182（2）
C09K005/14（2） H01B001/24（2） H01L021/28（2）
H01L021/44（2） H01L023/52（2） H01M004/62（2）
发明人 LEE M（15）
公开年 2021（4） 2022（3） 2023（3） 2014（2） 2015（2）
申请年 2022（5）  2014（3）  2019（3）  2021（2） 
专利权人 TAIWAN SEMIC.（11） LG CHEM CO L.（2） LG CHEM LTD（2）

Semiconductor structure use in semiconductor integrated circuit industry, has dielectric layer formed on substrate, graphene conductive structure formed with graphene layer, and graphene layer extending direction parallel to inner side surface of dielectric layer.

LI M, LU M, LI S, ZHAN Y, YANG S, GUO Z, LEE M, CHAN Y, KUO T

Method for manufacturing semiconductor structure, involves forming graphene conductive structure on metal layer, where conductive graphene is filled in interconnection channel and electrically connected with contact piece.

LI M, YANG S, ZHAN Y, LI S, ZHONG J, YEH C, LEE M, CHAN Y, CHUNG C

Interconnection structure useful for semiconductor device, has more than one first conductive features disposed in first dielectric layer, where more than one first conductive features include first metal, and multiple graphene layers include second metal, which is different from first metal.

SUI X, LI M, YANG S, ZHAN Y, LI S, SHUE S, LEE M, CHAN Y

Intraconnection structure useful in a post-section process of an integrated circuit i.e. semiconductor device, has second portion of conductive layer adjacent to first portion of conductive layer, and dielectric material contacts first interface portion and third interface portion.

MU X, LI M, YANG S, ZHAN Y, LI S, SHUE S, LEE M, CHAN Y

Integrated chip comprises substrate, first conductive component above substrate and second conductive component, upper portion of substrate and transversely adjacent to first conductive component where concave hole transversely separating first conductive component and second conductive component.

SUI X, LI M, CHUNG C, LU M, YANG S, SHUE S, LEE M

Semiconductor device has lower graphene layer which is in contact with lower surface of ruthenium wiring, and extends along lower surface of ruthenium wiring, and wiring line cap layer that extends along upper surface of ruthenium wiring.

LEE J E, LEE M J, KIM W D, SHIN H J, LEE H B, LIM H S, LEEMINJOO, LIM H, LI X, SHEN X, JIN W, LEE M, LI J

Integrated chip includes inner connecting through hole extending through inner connecting dielectric layer, directly configured on protective pad layer, and electrically coupled to inner connecting line, where pad layer comprises graphene.

SUI X, LI M, HUANG X, LU M, ZHAN Y, YANG S, CHAN Y, SHUE S, LEE M, HUANG H, LEE M H

Semiconductor structure for manufacturing integrated circuit (IC) device, has via which electrically couples first conductive feature to second conductive feature, and graphene layer arranged over portion of first conductive feature.

YANG S, CHAN Y, LEE M, CHEN H, SHUE S, LI M, SUI X, LEE M H

Interconnect structure for integrated circuit (IC) device e.g. transistor, has graphene layer which is provided between second contact feature and third dielectric layer.

YANG S, LEE M, SHUE S, LI M, SUI X, LEE M H

Interconnect structure used to fabricate e.g. transistors comprises first contact feature in first dielectric layer, second dielectric layer, second contact feature over first contact feature, barrier layer between second dielectric layer and second contact feature and carbon layer.

YANG S, LUO G, CHUNG C, LEE M, SHUE S, LI M, SUI X, LEE M H