国家/地区 日本（18） 美国（15）
IPC部 H（17） C（14） B（5）
G（3）
IPC大类 H01（17） C01（14） B82（5）
C23（2）
IPC小类 H01L（17） C01B（14） B82Y（5）
H01B（4） C23C（2）
IPC H01L023/532（16） H01L021/768（15） H01L021/3205（14）
C01B031/02（7） H01L021/28（6） H01L023/528（6）
B82Y030/00（5） C01B032/182（5） H01L023/522（5）
C01B032/15（4） C01B032/18（4） H01L021/336（4）
H01L023/52（4） C01B032/186（3） H01B005/14（3）
发明人 MIYAZAKI H（18）
公开年 2016（4） 2014（3） 2015（3） 2017（3） 2018（3）
申请年 2015（6）  2013（3）  2017（3）  2014（2）  2016（2） 
专利权人 TOSHIBA KK（17） KAJITA A（3） MIYAZAKI H（3） SAKAI T（3）
ISOBAYASHI A（2） SAITO T（2） WADA M（2）

Graphene-containing structure used for e.g. semiconductor device, comprises silicon carbide semiconductor layer, graphene layer on semiconductor layer, and aluminum nitride layer provided between semiconductor layer and graphene layer.

WU P T, YOSHIDA M, KIMURA S, MIYAZAKI H, YAMAZAKI Y

Graphene wiring structure for use in semiconductor device, has multilayer graphene formed on insulating film, where average particle diameter of graphene crystals is larger than width of multilayer graphene.

MIYAZAKI H, SAKAI T, NISHIDA Y, YOSHIDA T, YAMAZAKI Y, KATAGIRI M, SAKUMA N, SAKUMA H

Wiring for semiconductor device, includes first metal portion, multilayer graphene, and second metal portion which are interposed between conductive portions.

KATAGIRI M, SAITO T, SAKAI T, MIYAZAKI H

Graphene structure for use in a semiconductor device, comprises a multilayer graphene that is laminated with graphene sheets, where three interlayer materials are presented between the graphene sheets of the multilayer graphene.

MIYAZAKI H, YOSHIDA T, KATAGIRI M, YAMAZAKI Y, SAKAI T

Semiconductor device has graphene wiring which is connected to conductive region, and corrosion-proof element which is provided to cover area different from partial area of upper surface of connecting element.

MIYAZAKI H, SAKAI T, ISOBAYASHI A, ISHIKURA T, KAJITA A

Graphene wiring structure comprises multilayered graphene having laminated multiple planar polycrystal graphene sheets, and metal oxyhalide and metal halide which exist in the interlayer of planar polycrystal graphene sheets.

MIYAZAKI H, SAKAI T, KATAGIRI M, YAMAZAKI Y

Graphene wiring structure has multi-layer graphene portion whose outer surface is physically connected with side surface of orthogonal direction with respect to substrate of insulating film.

SAKAI T, YAMAZAKI Y, MIYAZAKI H, KATAGIRI M, KAJITA A, ISHIKURA T

Manufacture method of semiconductor device, involves forming graphene interconnect by patterning graphene film into which dopant is introduced.

WADA M, YAMAZAKI Y, MIYAZAKI H, KAJITA A, SAITO T, ISOBAYASHI A, ISHIKURA T, KATAGIRI M, SAKAI T

Graphene wiring structure comprises multilayer graphene and interlayer composites provided between layers of multilayer graphene, such that portion of defect and grain boundary of planar graphene sheet are closed.

SAKAI T, MIYAZAKI H, KATAGIRI M, YAMAZAKI Y

Graphene wiring has interlayer cross-linked layer which includes cross-linked molecular structure including multiple bonded molecules cross-linking graphene sheets included in multilayer graphene.

MIYAZAKI H, SAKAI T, YAMAZAKI Y, KATAGIRI M