国家/地区 韩国（16） 美国（12） 中国（5） 欧洲专利局（EPO）（4） 世界知识产权组织（2）
IPC部 H（11） B（10） C（9）
G（2）
IPC大类 H01（11） C01（8） B82（7）
C23（4） B01（2）
IPC小类 H01L（11） C01B（8） B82Y（4）
C23C（4） B82B（3） B01J（2）
IPC H01L029/16（8） H01L029/78（6） C01B031/02（5）
C01B031/04（5） H01L029/06（4） H01L029/66（4）
H01L029/786（4） B82B003/00（3） B82Y010/00（3）
H01L021/336（3） H01L029/08（3） H01L029/10（3）
B01J019/18（2） C23C016/18（2） C23C016/26（2）
发明人 PARK S（16）
公开年 2014（16）
申请年 2013（9）  2014（6） 
专利权人 SAMSUNG ELEC.（10） PARK S（4） BYUN K（3） CHUNG H（3）
HEO J（3） SEO D（3） SNU R DB FO.（3） SONG H（3）
UNIV SUNGKYU.（3） LEE J（2） UNIV SEOUL N.（2）

Graphene pattern formation method involves forming DNA pattern, and forming graphene pattern on DNA pattern.

JEONG S, LEE J, PARK I K, PARK J H, PARK S, ROH Y, YEON S

Patterning a graphene in the manufacturing of semiconductor chip, by forming a DNA pattern and forming graphene on pattern, where pattern is formed by forming metal ion pattern on a substrate and adsorbing a DNA structure on ion pattern.

JEONG S, LEE J, PARK I K, PARK J H, PARK S, ROH Y, YEON S

Large-surface-area single-crystal monolayer graphene material for e.g. transparent electrode, has graphene layer arranged on flat board or catalytic layer, where catalytic layer is arranged on crystal plane that is arranged on substrate.

PARK H B, KIM H, YOON H W, PARK S M, LEE M Y, HO B P, HEE W Y, SUN M P, YONG L M, LEE M, PARK H, PARK S, YOON H

Graphene device has insulating layer which is provided between graphene layer and gate electrode, and semiconductor substrate is provided with tunable Schottky barrier formed by junction of source electrode, graphene layer and substrate.

CHUNG H, SEO D, PARK S, BYUN K, SONG H, YANG H, HEO J, CHUNG H J, PARK S J, BYUN K E, SONG H J, YANG H J, HEO J S

Graphene memory has Schottky barrier that is formed between conductive semiconductor substrate and graphene layer such that graphene layer is used as charge-trap layer for storing charges.

LEE J, CHUNG H, PARK S, BYUN K, SEO D, SONG H, HEO J, LEE J H, CHUNG H J, PARK S J, BYUN K E, SONG H J, HEO J S, HUH J, JUNG H, SONG C, SAIL D

Graphene device used for electronic apparatus e.g. semiconductor device, consists of active layer, graphene layer, and electrode spaced apart from graphene layer and controls work function of graphene layer based on applied voltage.

SHIN H, BYUN K, SONG H, PARK S, SEO D, WOO Y, LEE D, LEE J, CHUNG H, HEO J, YOO I, SHIN H J, BYUN K E, SONG H J, PARK S J, WOO Y S, LEE D W, LEE J H, CHUNG H J, HEO J S, YOO I K, JIN S H, EUN B G, JAE S H, JUN P S, SEOK S H, SEONG W Y, GYEONG Y I, UK L D, HO L J, JONG J H, SEONG H J, HUI D, HUH J, YEO R, JUNG H

Making nanostructure involves forming graphene layer, forming block copolymer template layer on graphene layer and precursor pattern of metal coupled to block copolymer template layer, and forming metal nanopattern on graphene layer.

KIM U, KIM J, ROH Y, PARK S, PARK Y, YOO S, LEE C, LEE J, CHEON S, KIM U J, KIM J E, ROH Y G, PARK S J, PARK Y S, YOO S M, LEE C W, LEE J S, CHEON S M

Electronic device e.g. field effect transistor (FET) has graphene that directly contacts area of semiconductor layer, and metal layer on graphene.

BYUN K, PARK S, SEO D, SONG H, LEE J, CHUNG H, HEO J, BYUN K E, PARK S J, SONG H J, LEE J H, CHUNG H J, HEO J S

Manufacture of graphene for fabricating electronic device and display device, involves forming silicon carbide thin film on substrate, forming metal thin film on silicon carbide thin film, and heating to obtain metal composite layer.

LEE D W, SHIN H, PARK S, BYUN K, SEO D, SONG H, WOO Y, LEE J, CHUNG H, HEO J, SHIN H J, PARK S J, BYUN K E, SONG H J, WOO Y S, LEE J H, CHUNG H J, HEO J S

Graphene switching device for use as diode has gate electrode which is provided on gate insulation layer arranged on graphene layer set on insulation layer.

LEE J, PARK S, BYUN K, SEO D, SONG H, SHIN H, CHUNG H, HEO J, LEE J H, PARK S J, BYUN K E, SONG H J, SHIN H C, CHUNG H J, HEO J S