国家/地区 美国（17） 韩国（14） 中国（6） 日本（4）
IPC部 H（17） B（10）
IPC大类 H01（17） B82（8） B32（2）
IPC小类 H01L（17） B82Y（8） B32B（2）
H01B（2）
IPC H01L029/78（14） H01L021/336（9） H01L029/16（8）
H01L029/786（8） B82Y099/00（6） H01L029/06（6）
H01L029/66（5） H01L029/778（5） H01L029/10（4）
H01L029/772（4） B82Y010/00（3） B82Y040/00（3）
H01L021/78（3） H01L029/08（3） H01L029/417（3）
发明人 YANG H（17）
公开年 2012（7） 2013（5） 2014（2）
申请年 2011（7）  2013（3）  2010（2）  2012（2）  2014（2） 
专利权人 SAMSUNG ELECTRONICS CO LTD（17）

Semiconductor device e.g. NAND flash memory device, has gate layers stacked in vertical direction perpendicular to upper surface of substrate and spaced apart from each other on pattern layer, and memory vertical structure penetrating through gate layers in direction.

YANG H, KANG S

Method for fabricating graphene electronic device i.e. FET, of radio frequency device, involves exposing graphene layer in channel formation region by wet etching metal protection layer and metal layer using photoresist pattern.

HEO J, CHUNG H, SEO S, LEE S, YANG H

Graphene device has insulating layer which is provided between graphene layer and gate electrode, and semiconductor substrate is provided with tunable Schottky barrier formed by junction of source electrode, graphene layer and substrate.

CHUNG H, SEO D, PARK S, BYUN K, SONG H, YANG H, HEO J, CHUNG H J, PARK S J, BYUN K E, SONG H J, YANG H J, HEO J S

Graphene electronic device e.g. FET has gate oxide layer that is formed to cover graphene channel layer between source and drain electrodes, and gate electrode that is provided on channel layer between source and drain electrodes.

HEO J, CHUNG H, SEO S, LEE S, YANG H

Graphene electronic device, useful as e.g. FET, comprises graphene channel layer formed on hydrophobic polymer, gate oxide covering channel layer exposed by source and drain electrodes, and gate electrode formed on portion of channel layer.

YANG H, SEO S, LEE S, CHUNG H, HEO J

Three-dimensional zero gap semiconductor graphene switching device, has graphene layer surrounding end portion of semiconductor layer, and gate insulation layer surrounding graphene layer, where gate surrounds insulation layer.

HEO J, PARK S, BYUN K, SEO D, SONG H, YANG H, CHUNG H, HEO J S, PARK S J, BYUN K E, SONG H J, YANG H J, CHUNG H J

Electrode structure for semiconductor device e.g. FET used in electronic device, has graphene layer that is configured to contact one of semiconductor layer and electrode containing metal.

YANG H, PARK S, CHUNG H, HEO J, YANG H J, PARK S J, CHUNG H J, HEO J S, HUH J, JUNG H

Graphene switching device with tunable barrier used as diode, triode, or transistor has graphene layer which is formed between semiconductor layer and gate substrate.

HEO J, CHUNG H, SONG H, PARK S, SEO D, YANG H, HEO J S, JEONG H J, SONG H J, PARK S J, DAVID S, YANG H J, CHUNG H J, HUH J, SONG C, SERIO D, JUNG H

Method for transferring graphene, involves forming trench on substrate, arranging graphene layer using additive liquid on substrate, pressurizing graphene layer on substrate, and removing additive liquid from substrate by drying.

SEOK S H, SEONG H J, JONG J H, JUN Y H, JUN P S, JAE S H, SEO D, HEO J, CHUNG H, YANG H, PARK S, SONG H, HEO J S, CHUNG H J, YANG H J, PARK S J, SONG H J

Graphene electronic device e.g. back gate FET, has graphene channel layer extending between metals, and source electrode and drain electrode provided on edges of channel layer and formed to have thickness of specific range.

HEO J, CHUNG H, SEO S, LEE S, YANG H, HEO J S, CHUNG H J, SEO S A, LEE S H, YANG H J, JEONG H J, HUH J, JUNG H