国家/地区 中国（18）
IPC部 H（16） C（4） G（3）
B（2）
IPC大类 H01（16） B82（2） C01（2）
C23（2） G11（2）
IPC小类 H01L（16） B82Y（2） C01B（2）
C23C（2） G11C（2）
IPC H01L021/285（3） H01L021/336（3） C01B031/04（2）
H01L021/02（2） H01L021/283（2） H01L045/00（2）
发明人 ZHOU P（18）
公开年 2014（9） 2012（4） 2011（3） 2010（2）
申请年 2014（6）  2011（5）  2013（3）  2010（2）  2012（2） 
专利权人 UNIV FUDAN（18）

Two-dimensional metal layer reduced graphene electrode contact resistance method, involves providing graphite with dilute sample, performing physical gas phase deposition process, and forming two-dimensional graphene with metal structure.

SUN Q, YANG S, ZHOU P, ZHANG W

Depositing high dielectric thin film graphene on sample specimen involves providing high dielectric medium to grow graphene on desired sample.

SHEN Y, WEI H, YANG S, ZHOU P

Method for growing island-shaped graphene sheet using high dielectric medium, involves cleaning graphene sample to remove impurity, and forming high dielectric medium thin film on sample using atom layer deposition process.

SHEN Y, WEI H, YANG S, ZHOU P

Graphene nano-wire production method involves producing source electrode, drain electrode and gate device to form graphene nano-wire device.

YANG S, ZHOU P, SHEN Y

Transferring CVD graphene device preparing method for carbon-based integrated circuit manufacturing field, involves performing substrate cleaning process, polishing substrate surface, and performing surface impurity removing process.

YANG S, ZHOU P, SHEN Y

High temperature graphene liquid metal spin coating method, involves adding dilute sample in growth medium by graphite layer, and fixing aluminum seed layer with graphene sample thin film layer by using atom layer deposition process.

SHEN Y, WEI H, YANG S, ZHOU P

Channel width controlled large area graphene nanometer belt Fin-FET device, has transfer graphene-containing layer formed on source/drain electrode of substrate, where part of graphene-containing layer is located on medium layer of gate.

SUN Q, WANG P, ZHOU P, ZHANG W, DAI Y

Graphene oxide-based flexible charge trap memory has charge trap layer which is made of graphene oxide and is provided on upper surface of charge tunneling layer.

WANG P, ZHOU P, ZHANG W, SUN Q, WANG L

Graphene belt based spin valve contains edged carbon atoms as graphene nanometer belt spin transport channel, and is prepared by cleaning doped silicon substrate and applying silicon dioxide layer on silicon substrate.

WANG P, ZHOU P, ZHANG W, SUN Q, WANG L

Method for increasing high-k dielectric constant on graphene buffer layer utilized for manufacturing carbon-based integrated circuit, involves providing graphene thin film to grow high dielectric constant and preparing buffer solution.

SHEN Y, SUN Q, WANG P, ZHOU P, ZHANG W